# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/spi-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: SPI Controller Common Properties

maintainers:
  - Mark Brown <broonie@kernel.org>

description: |
  SPI busses can be described with a node for the SPI controller device
  and a set of child nodes for each SPI slave on the bus. The system SPI
  controller may be described for use in SPI master mode or in SPI slave mode,
  but not for both at the same time.

properties:
  $nodename:
    pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"

  "#address-cells":
    enum: [0, 1]

  "#size-cells":
    const: 0

  cs-gpios:
    description: |
      GPIOs used as chip selects.
      If that property is used, the number of chip selects will be
      increased automatically with max(cs-gpios, hardware chip selects).

      So if, for example, the controller has 4 CS lines, and the
      cs-gpios looks like this
        cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;

      Then it should be configured so that num_chipselect = 4, with
      the following mapping
        cs0 : &gpio1 0 0
        cs1 : native
        cs2 : &gpio1 1 0
        cs3 : &gpio1 2 0

      The second flag of a gpio descriptor can be GPIO_ACTIVE_HIGH (0)
      or GPIO_ACTIVE_LOW(1). Legacy device trees often use 0.

      There is a special rule set for combining the second flag of an
      cs-gpio with the optional spi-cs-high flag for SPI slaves.

      Each table entry defines how the CS pin is to be physically
      driven (not considering potential gpio inversions by pinmux):

      device node     | cs-gpio       | CS pin state active | Note
      ================+===============+=====================+=====
      spi-cs-high     | -             | H                   |
      -               | -             | L                   |
      spi-cs-high     | ACTIVE_HIGH   | H                   |
      -               | ACTIVE_HIGH   | L                   | 1
      spi-cs-high     | ACTIVE_LOW    | H                   | 2
      -               | ACTIVE_LOW    | L                   |

      Notes:
      1) Should print a warning about polarity inversion.
         Here it would be wise to avoid and define the gpio as
         ACTIVE_LOW.
      2) Should print a warning about polarity inversion
         because ACTIVE_LOW is overridden by spi-cs-high.
         Should be generally avoided and be replaced by
         spi-cs-high + ACTIVE_HIGH.

      The simplest way to obtain an active-high CS signal is to configure the
      controller's cs-gpio property with the ACTIVE_HIGH flag and set the
      peripheral's spi-cs-high property. See example below for a better
      understanding.

  fifo-depth:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Size of the RX and TX data FIFOs in bytes.

  rx-fifo-depth:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Size of the RX data FIFO in bytes.

  tx-fifo-depth:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Size of the TX data FIFO in bytes.

  num-cs:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Total number of chip selects.

  spi-slave:
    $ref: /schemas/types.yaml#/definitions/flag
    description:
      The SPI controller acts as a slave, instead of a master.

  slave:
    type: object

    properties:
      compatible:
        description:
          Compatible of the SPI device.

    required:
      - compatible

patternProperties:
  "^.*@[0-9a-f]+$":
    type: object
    $ref: spi-peripheral-props.yaml
    additionalProperties: true

    properties:
      spi-3wire:
        $ref: /schemas/types.yaml#/definitions/flag
        description:
          The device requires 3-wire mode.

      spi-cpha:
        $ref: /schemas/types.yaml#/definitions/flag
        description:
          The device requires shifted clock phase (CPHA) mode.

      spi-cpol:
        $ref: /schemas/types.yaml#/definitions/flag
        description:
          The device requires inverse clock polarity (CPOL) mode.

    required:
      - compatible
      - reg

dependencies:
  rx-fifo-depth: [ tx-fifo-depth ]
  tx-fifo-depth: [ rx-fifo-depth ]

allOf:
  - if:
      not:
        required:
          - spi-slave
    then:
      properties:
        "#address-cells":
          const: 1
    else:
      properties:
        "#address-cells":
          const: 0
  - not:
      required:
        - fifo-depth
        - rx-fifo-depth
  - not:
      required:
        - fifo-depth
        - tx-fifo-depth

additionalProperties: true

examples:
  - |
    spi@80010000 {
        #address-cells = <1>;
        #size-cells = <0>;
        compatible = "fsl,imx28-spi";
        reg = <0x80010000 0x2000>;
        interrupts = <96>;
        dmas = <&dma_apbh 0>;
        dma-names = "rx-tx";

        display@0 {
            compatible = "lg,lg4573";
            spi-max-frequency = <1000000>;
            reg = <0>;
        };

        sensor@1 {
            compatible = "bosch,bme680";
            spi-max-frequency = <100000>;
            reg = <1>;
        };

        flash@2 {
            compatible = "jedec,spi-nor";
            spi-max-frequency = <50000000>;
            reg = <2>, <3>;
            stacked-memories = /bits/ 64 <0x10000000 0x10000000>;
        };
    };

  - |
    #include <dt-bindings/gpio/gpio.h>

    spi@20204000 {
        #address-cells = <1>;
        #size-cells = <0>;
        compatible = "brcm,bcm2835-spi";
        reg = <0x7e204000 0x1000>;
        interrupts = <2 22>;
        clocks = <&clk_spi>;
        cs-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;

        display@0 {
            compatible = "lg,lg4573";
            spi-max-frequency = <1000000>;
            reg = <0>;
            spi-cs-high;
        };
    };
